"It is now accepted that the functionality of intelligent video surveillance is logically migrating away from central or networked servers to the edge of the network -- to the image capture device, the camera. Today, the basic platform intelligence in the camera is DSP-enabled only. Sophisticated image processing requires more. Eutecus takes a major step forward, enabling cellular multicore parallel image processing within the camera, at the image capture point, with C-MVA embedded in a FPGA, delivering a totally new level of analytics capability" says Stephen D. Hester, president and CEO of Eutecus.

"Eutecus' approach with C-MVA brings the ability to reduce video bandwidth requirements and associated networking costs stemming from the use of distributed IP networks for real time security and surveillance. The movement of the intelligence for analytics into the camera means that video streams only have to go through the network if there is a change detected by the cameras" Stephen continues.

"In most dedicated vision systems, the DSP or other main processor handles all aspects of the image processing flow by itself-starting with the computationally-intensive, pixel-level pre-processing tasks like convolution, foreground/background detection, and morphology, and then on to higher-level tasks like tracking, object classification, and high-level behavior analysis. With the introduction of C-MVA, the DSP only performs the higher-level tasks while C-MVA converts the raw input into useable black-and-white images of salient features. C-MVA offers OEMs and systems integrators a significantly more muscular platform for running video analytics applications in multiple applications" says Dr. Csaba Rekeczky, Co-CTO and VP of research at Eutecus.

The C-MVA processor is composed of a cascade of highly optimized processing blocks embedded in FPGA, which takes over the computationally-intensive, pixel-level early tasks of the video processing flow (such as convolution, foreground/background detection, and morphology) that would otherwise be handled by the main processor inside an intelligent camera (e.g., a DSP).

C-MVA is currently configured to run on the Spartan 3 FPGA (with 32 MB SDRAM) embedded in Eutecus' Bi-i V301F intelligent camera reference design and fully integrated into Eutecus' InstantVision integrated software environment. Eutecus works closely with OEMs at all levels to help deploy CVT-based applications on a wide variety of hardware and software platforms.

In its first implementation, C-MVA pre-processes 320 x 240 resolution images at a rate of 30 FPS. Eutecus' multicore CVT architecture provides almost unlimited scope for increased pixel rate.

The individual cores that constitute the C-MVA are also available as separate IP blocks for implementation in other FPGA configurations or in ASICs.